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key_duli
- FPGA实现verilog语言的按键防抖功能，能够很有效的实现了按键的加减数据的功能，通过一位数码管显示。-FPGA implementation verilog language button image stabilization feature, can be very effective to achieve the subtraction key data features, through a digital display.
04_key_led
- 用Verilog HDL语言编写通过按键开关控制发光二极管的亮灭-Use Verilog HDL language through key switch control destroy the light of the light emitting diode
key_scan_design
- 按键控制试验 verilog编写，详细描述了怎么来控制开发板上的按键-Key controlled trial verilog written, detailed descr iption of how to control the development board buttons
key_vhd
- verilog hdl key test-key test vhdl
test_led
- Verilog语言的24小时计数器，数码管显示，按键调时，在CPLD上调试正常。-Verilog language 24-hour counter, digital display, when the key tone on CPLD normal debugging.
Verilog_HDL
- 本文档记录了有关Verilog HDL语言学习的注意地方,以及一些关键语法的摘抄,初学者可以查找有关Verilog HDL的语法,加快学习。-This document records the Verilog HDL language learning about local attention, as well as some of the key excerpt syntax, beginners can find information about the syntax of Verilo
key_led
- 基于xilinxFPGA测试通过，按键消抖动，verilog编写，控制流水灯-Based xilinxFPGA test, the key jitter elimination, verilog prepared to control water lights
key_ctr_smg
- 使用altera公司的处理器，使用verilog语言编程，程序功能是按键控制数码管-Use altera' s processors, using verilog language programming, the program features a digital key control
LEDD
- 此例为LED流水灯设计，采用verilog编程,可实现流水灯左右移，增加了分频模块，充分利用实验板LED灯资源、开关资源、按键资源。-This example is water LED lights design, using verilog programming, can be moved around water lights, increasing the frequency module, make full use of experimental board LED light re
key_vhd
- verilog hdl key test-key test vhdl
ps2_lcd16
- verilog 编写的ps2键盘接口协议，FPGA接收到断码后确定通码,译码后显示到lcd1602上。说明：只是个按键，没有检测shift按键。只是译码了部分按键。-it is design by verilog language.the function is encode the keyboard and show on lcd. notice:the encode part is only encode one key. and only encode part of the keyboa
calculator
- 基于FPGA DE2开发板的计算器设计。Verilog语言编写。矩阵键盘输入，LCD1602显示。程序包括按键扫描模块、数值处理计算模块和LCD控制写模块等。-Calculator design based on FPGA DE2 development board. language use Verilog. Matrix keyboard input, LCD1602 display. Program includes key scanning module and LCD module
exercise1
- 使用verilog编写的按键控制数码管的程序，四个拨动开关控制数的进制-Verilog prepared using digital key control procedures, four toggle switch controls the number of decimal
VGA1
- 这是我自己的一个流水灯的设计编程 在ise10.1环境下做的Verilog编程 用Spartan3E basys2开发板可以实现八个led灯的循环 有一个复位rst 设计关键是分频器的设计 这里运用的是d触发器实现50MHz的50M分频-This is my own design of a light water program in ise10.1 do Verilog programming environment with Spartan3E basys2 development bo
ps2scan
- 采用VERILOG的CPLD编程，通过ps2接收键盘数据，然后把接收到的字母A到Z键值转换相应的ASII码，通过串口发送到PC机上。 -Using VERILOG CPLD programming, through the PS2 receive keyboard data, and then receive the letters A to Z key transformation corresponding ASII code, through the serial port to se
IR
- verilog编程，红外线接收测试 用市面上通用的（只需几元）的红外线遥控器，对准板上U10,按下1-9数字键，在数码管上显示对应数字。-The infrared receiving test With the market general (only a few yuan) of the infrared remote controller, an alignment plate U10, press 1-9 key, the corresponding digital display
Ex18_key3x4
- 键盘3*4扫描，Verilog 语言编写-key scan 3*4 ,verilog hdl
StopWatch
- verilog实现数字式秒表，秒表有一个按键开关：当电路处于“初始”状态时，第一次按键，计时开始（“计时”状态）；再 次按键。计时停止（“停止”状态）；第三次按键，计时器复位为 0’0’.0’’，且电路恢复到“初始”状态。详见压缩文件包内pdf说明。-Verilog in implementing digital stopwatch, stopwatches have a key switch: when the circuit is in the initial State, firs
key_detect
- 由verilog编写的简单的按键消抖模块。主要是由“电平检查模块”和“10ms延迟模块”组合合成。-Verilog prepared by the simple key debounce module. Mainly synthesized by a combination of level examination module and module 10ms delay
ps2
- ps2键盘扫描程序verilog实现，将按键值转化为扫描值-ps2 keyboard scanner verilog realization, the key will be converted to scan values